The present invention relates to electronic circuits, and more particularly to current steering digital to analog converters.
As is widely known, a digital to analog converter (DAC), operating on the current steering principle, generates a set of binary weighted currents and selectively sums the generated currents to provide an analog output signal. FIG. 1 is a schematic diagram of a conventional N-bit current steering DAC 100, only two of the current stages of which are shown. Current sources 1021, . . . 102N generate currents I1, . . . IN that, depending on code signals S1, . . . SN and their complements S1 . . . SN, are steered either through resistive load 110 or resistive load 112.
As the integrated circuit processing technology scales down and transistor sizes are reduced, the voltages across many of terminals of the transistors shown in FIG. 1 begin to exceed the maximum allowable limits. Therefore, it would be desirable to have a current-steering DAC that can safely operate with existing supply voltages, for example, 3.3 volts, using transistors that have smaller physical dimensions, for example, smaller channel lengths, thinner gate oxides, etc.